Silicon carbide (below, referred to as “SiC”) is excellent in heat resistance and mechanical strength and is physically and chemically stable, so is gathering attention as an environmentally resistant semiconductor material. Further, in recent years, demand for epitaxial SiC wafers has been growing as substrates for high frequency, high withstand voltage electronic devices etc.
When using an SiC single crystal substrate (below, sometimes called an “SiC substrate”) to fabricate a power device, high frequency device, etc., usually the SiC substrate is formed with an SiC thin film by epitaxial growth by the thermal CVD process (thermal chemical vapor deposition process) or is directly doped with a dopant by the ion implantation process. In the latter case, after implantation, high temperature annealing becomes necessary, so thin films are being frequently formed by epitaxial growth.
On SiC epitaxial films, triangular defects, carrot defects, comet defects, and other such epitaxial defects and other fine surface relief shapes, so-called “step bunching”, are present. This step bunching occurs since when epitaxial growth proceeds due to step flow, since the speed of advance of the steps are not the same, fast steps catch up with slow steps and therefore the step heights become greater. If step bunching is present, for example, when forming an MOS device over it, the relief shapes at the interfaces of the oxide film and SiC will cause a drop in the mobility of the electrons and the device characteristics will decline. For this reason, to improve the characteristics and yield of the devices, it is necessary to also reduce this step bunching in the same way as epitaxial defects.
This step bunching clearly generally already occurs at the point of time of etching treatment of the SiC substrate performed before growth. Studies on the conditions of etching treatment not causing step bunching are underway. As one example, it is shown that by using a mixed gas of hydrogen and silane as the etching treatment gas, step bunching after the etching treatment can be greatly reduced compared with etching treatment using only hydrogen (see NPLT 1).
FIG. 1 shows the growth sequence by typical thermal CVD at the time of conventional epitaxial film growth together with the timings of introduction of the gases. First, an SiC substrate is set in an epitaxial growth furnace, the inside of the epitaxial growth furnace is evacuated, then a carrier gas of hydrogen is introduced and the pressure is adjusted to 2×103 to 2×104 Pa. After that, the pressure is maintained constant while raising the temperature of the epitaxial growth furnace. After reaching 1550 to 1600° C. or so, SiH4 is introduced to start the etching treatment (in state supplying carrier gas of hydrogen). The flow rate of SiH4 at this time is 1 to 2 cm3 per minute, while the flow rate of the carrier gas of hydrogen is 100 to 200 liters per minute. After the end of the etching treatment, the temperature of the epitaxial growth furnace is changed to the epitaxial growth temperature of 1600 to 1650° C. or so, but during that time, the introduction of SiH4 is stopped. After the temperature of the epitaxial growth furnace stabilizes, the silicon-based material gas SiH4 is again introduced and simultaneously the carbon-based material gas C3H8 and doping gas N2 are introduced to start the epitaxial growth. The flow rate of SiH4 at this time is 100 to 150 cm3 per minute, the flow rate of C3H8 is 50 to 70 cm3 per minute (the C/Si ratio is 1.0 to 2.0 or so), and the speed of epitaxial growth is 10 μm per minute or so. This speed of epitaxial growth was determined considering productivity since the film thickness of the epitaxial layer usually used is 10 μm or so. When the desired film thickness has been obtained, the introduction of SiH4, C3H8, and N2 is stopped and only hydrogen gas is supplied. In this state, the temperature is lowered. After the temperature falls to ordinary temperature, the introduction of hydrogen gas is stopped, the inside of the epitaxial growth chamber is evacuated, inert gas is introduced into the epitaxial growth chamber and the epitaxial growth chamber is returned to atmospheric pressure, then the SiC substrate is taken out.
However, even if using the above mixed gas of hydrogen and silane, with the conventional method, step bunching was observed to occur with a considerable frequency after epitaxial growth. Instability of the surface conditions after etching treatment is suggested. Therefore, attempts have further been made to suppress step bunching. PLT 1 proposes to introduce trichlorosilane or another silicon-chlorine-based gas into the mixed gas of hydrogen and silane. This discloses that if silane breaks down, various types of compounds would be produced, but in the case of a silicon-chlorine-based gas, even if it breaks down, it forms SiCl2 and therefore a stable etching speed is obtained. PLT 2 discloses the art of controlling the Si/C ratio in the film formation to suppress the atomic steps. At the start of film formation from the etching at this time, it is proposed to maintain the Si/C ratio constant. PLT 3 discloses the art of making the depth of etching by hydrogen etching a constant value (1 nm) or less so as to suppress giant step bunching (GSB) due to basal plane dislocation (BPD). At this time, it is proposed to instantaneously switch between the etching process and the process for forming the epitaxial growth layer. Specifically, it has been proposed to introduce the material gas for epitaxial growth substantially simultaneously with stopping the introduction of the etching gas or to continue the introduction of the etching gas and in that state additionally introduce a gas required for forming the epitaxial growth layer as a material gas. Therefore, in epitaxial SiC wafers, for which application to devices is expected in the future, unless stabilizing the surface conditions after the etching treatment and stably reducing step bunching after epitaxial growth, it was difficult to prepare electronic devices with excellent characteristics with a high yield.